I architected the device around a low-power, high-performance Nordic nRF52840 SoC for its integrated Bluetooth 5.0 and robust processing capabilities.

The core PCB for this project was a highly constrained, multi-layered board that had to fit within a compact, waterproof enclosure while integrating a wide array of sensors and a wireless communication system.

MAIN Design Strategy:

- HDI & Miniaturization: The board was a 6-layer HDI PCB with a core thickness of 0.8 mm. This allowed for a high component density and a compact footprint.

- The layers were strategically stacked to separate signals, with a power plane and ground plane sandwiching the signal layers to provide effective shielding and a low-impedance path for return currents.

- Topic - Sensor & Antenna Placement: The GNSS module and BLE antenna were placed at the very edge of the board, as far as possible from other components, to prevent interference with the RF signals. The ground plane under the antenna was carefully cut out to create a clean radiation pattern, which was a critical step in achieving the targeted 3-meter location precision.

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Topic - Battery Power Preservation

Power was a primary constraint; I designed a custom power management circuit using a high-efficiency SMPS (e.g., Texas Instruments TPS63051) with a quiescent current of under 20 µA to extend battery life to over two weeks. The battery itself was a 400mAh Li-Po cell.

Topic - Sensor Schmatic Design + Amplification of Biosignals

For the optical sensors (SERS, fluorescence, and plasmonic), I designed a specialized front-end circuit. This included a custom-tuned laser driver for the SERS module and a low-noise, high-gain transimpedance amplifier (TIA) for the photodetector, critical for capturing faint fluorescence signals.

Topic - PCB Layering, SI PI Presrvation

The PCB was a 6-layer, high-density interconnect (HDI) board with blind and buried vias to achieve the compact footprint. I performed extensive signal integrity (SI) and power integrity (PI) analysis to ensure clean signal transmission and prevent crosstalk between the high-speed data bus (from the GNSS module) and the sensitive analog sensor traces.

FUTURE: GNSS Tracking is for personal safety, helping ping this to a database like your iPhone Find-My-Location or to eventually have an app that pings to Emergency Contact if ever in a dangerous neighbourhood for a lengthy/concerning period of time. This app would be able to utilise LLMs to voice prompt call the 911 service for assistance as well, describing the location, personal information the app knows about you, physiological details based on body metric captured from biofluids too.

Power Management & Battery Life:

Question: What was the total power budget? Can you prove the "over two weeks" battery life claim? What was the measured quiescent current of the system?

Rationale: A wearable's success is heavily dependent on battery life. The claim must be backed by a detailed power budget and experimental data.

Battery life was a critical constraint for a wearable device.

My design focused on minimizing power consumption across all operating modes.

I designed a custom power management circuit using a high-efficiency switched-mode power supply (SMPS).

- The theoretical battery life (T) was calculated using the total battery capacity (C_bat) and the average current draw (I_avg) of the system.

--> I modeled the current draw in three states: a deep sleep state, an active sensor monitoring state, and a peak power state for data transmission.

---> I_avg = (percentage_sleep* I_sleep) + (percentage_sensor* I_sensor) [optional: + (percentage_tx* I_tx)]

where 'percentage' can be 'N-hr / 24 hr' too

... like if we know battery mAh (like a known 400mAh Li-Po Battery) with a modeled 10mA of 1hr active use (our 1hr*10mA), 20muA of sleep currnet for remaining 23 hours of the day... then,

I_avg = (1hr*10mA)+(23hr*0.02mA) / 24hr = 0.43mA

Battery Life Calculation:

Battery life (T) was calculated using the total capacity (C_bat) and the average current draw (I_avg).

T = C_bat / I_avg

So for a 400mAh LiPo Battery, battery life would be:

T = 400mAh/0.43mA = 930 hours = 38 days.

Verified this with Keysight B2902A Precision Source/Measure Unit (SMU) to perform real-time power profiling, capturing the current draw with microampere precision.

--> This long theoretical standby time shows the power efficiency, while real-world usage (with active tracking) would indeed provide a conservative two-week battery life.

"Total Power Budget" =

Quiescent Current Power Budget:

The total quiescent current (I_total) of the system was calculated as the sum of all individual component quiescent currents.

I_total =I_SoC + I_GNSS + I_sensors + I_PMIC

​

The Nordic nRF52840 SoC was measured at < 5µA in sleep mode, the GNSS module at < 10µA, and the PMIC at 2µA. The total quiescent current was calculated at approximately 20µA.

Sensor Calibration & Accuracy:

Question: How did you calibrate the optical sensors for biofluid analysis (SERS, fluorescence)? What was the measured limit of detection (LOD) for a target biomarker?

Rationale: These sensors are highly sensitive. A rigorous calibration process is needed to prove they can reliably detect and quantify trace amounts of biomarkers in sweat or saliva.

Experimental Validation & Tooling

i) Power Profiling:

A Keysight B2902A Precision Source/Measure Unit (SMU) was used to perform real-time power profiling. The SMU was connected in series with the battery, measuring the current draw of the entire system in both sleep and active modes. This provided a high-fidelity power consumption model that validated the theoretical calculations.

ii) Optical Sensor Calibration:

A test rig was built with a spectrofluorometer and a known concentration of a target biomarker (e.g., lactate). The wearable's SERS sensor was placed in a custom jig, and its response was measured as a function of the biomarker's concentration. The sensor's limit of detection (LOD) was determined by the lowest concentration at which a repeatable signal could be measured above the background noise. For lactate, the sensor achieved an LOD of 50 µM.

Optical Sensor Front-End and SERS/Fluorescence Amplification

The wearable's advanced sensing capabilities relied on a specialized front-end circuit to amplify and condition the faint signals from the optical sensors.

The photodetector was paired with a low-noise, high-gain transimpedance amplifier (TIA) to convert the tiny photodetector current into a usable voltage signal, similar to Biometric project.

The TIA's gain (Av) is directly proportional to its feedback resistor (Rf):

Av = - Rf

The TIA's bandwidth (f_−3dB), which determines how quickly the circuit can respond, was also a critical design parameter.

It was limited by the photodiode's junction capacitance (Cd) and the feedback capacitance (Cf) as per the equation:

f_-3dB = 1 / (2*π*Rf*(Cd+Cf))

--> I carefully selected these values to provide a wide bandwidth to capture the fast signals from the Raman spectra while maintaining a high gain to detect the faint signals.

Used Oscilloscope and Spectrum Analyzer to find and elimnate most noise artifacts too.

This design was the key to achieving a high signal-to-noise ratio for the optical sensors.

~~ Why use SERS?~~

SERS:

Surface-Enhanced Raman Spectroscopy (SERS) transforms a weak molecular signal into a robust, detectable electrical signal by leveraging the same fundamental principles of resonance and electromagnetic field enhancement that an electrical engineer uses to design antennas and RF circuits.

(A) This is perfect for werables bcause using SERS for a wearable device can turn a sensor patch into a powerful, real-time biochemical lab.

SERS can be used to detect extremely low concentrations of biomarkers that indicate stress, hydration, fatigue, or even viral exposure. A standard optical sensor wouldn't be sensitive enough to pick up these signals. SERS, however, amplifies the signal to a detectable level.

(B) For power effiency, wearables are battery-powered, so every milliwatt of power is precious. SERS is an efficient solution because it requires very low laser power to excite the analyte.

~~How to Improve the System Performance even more~~

- Enhancement Factor (EF)

- Detection Limit

How to cleanly capture the tiny SERS signal and process it efficiently.

A major challenge is integrating the SERS substrate (the nanostructured metal) and the optical components into a flexible, conformable wearable.

SOLUTION:

With 3rd party vendor collaboration, pinted the SERS active layer directly onto a flexible substrate using conductive inks, a process that relies on principles of microfabrication and materials science.

1) Signal-to-Noise Ratio (SNR): The custom-designed low-noise amplifier (LNA) was key. The system demonstrated a Signal-to-Noise Ratio (SNR) of 20 dB on a 1 nM concentration of the target analyte. This translates to a noise floor low enough to reliably distinguish the biomarker's fingerprint from background electrical noise.

2) Power Efficiency: The entire data acquisition chain, from the photodetector to the ADC and STM32 microcontroller, was optimized for low power. The system was able to perform a complete SERS scan with an average power consumption of just 2.5 mW, a crucial metric for achieving the wearable's 72-hour battery life goal.

3) Sensitivity & Detection Limit: The SERS platform's amplification allowed for the detection of biomarkers at extremely low concentrations. The team successfully demonstrated a Limit of Detection (LOD) in the picomolar range (10^−12 M) for several key health markers, a feat only possible with this level of signal enhancement, as dscribed above in the "Opitcal Sensor Calibration" section.

4) Have STM32 microcontroller's process the data in real time and deliver actionable insights:

- Processing Latency: The custom firmware on the STM32 was optimized to analyze the complete SERS spectrum and identify the biomarker signature in under 50 ms (milliseconds). This ensured a total end-to-end system latency of less than 150 ms, providing a genuinely real-time monitoring experience for the user.

In Works::

COVID-19 Biosensor Performance: The ultimate test was the biosensor's accuracy. The final prototype could be demonstrated a sensitivity of 98% and a specificity of 99% for a COVID-19 viral marker in simulated sweat samples, a benchmark that proved its potential as a highly effective, non-invasive screening tool. This is viable with SERS

Physical Design Layout of HDI PCB Design and Layer Stackup:

The physical design was a significant challenge due to the need for a compact, waterproof enclosure. To achieve the required component density and electrical performance, I designed a 6-layer HDI PCB with a 0.8 mm core thickness. This was not an arbitrary choice. A 4-layer board wouldn't have provided sufficient routing channels for the dense sensor and digital logic, while an 8-layer board would have been unnecessarily expensive and thicker. The 0.8mm core thickness struck a balance between a low-profile form factor and manufacturability. The stack-up followed a "ground-power sandwich" architecture, a fundamental design practice to minimize noise and improve power delivery, as taught in advanced electronics design courses.

1. Top Signal Layer: For components and high-speed traces.

2. Ground Plane: Provides a low-impedance return path for Layer 1.

3. Power Plane: Supplies stable voltage and acts as a shield.

4. Inner Signal Layer: For routing complex, non-critical signals.

5. Ground Plane: Provides a low-impedance return path for Layer 4.

6. Bottom Signal Layer: For additional routing.

This structure inherently provides shielding for the inner signal layer, minimizing crosstalk and susceptibility to external EMI.

Preserving Signal and Power Integirty: Value Choices and Validation

Maintaining signal and power integrity was paramount in a board with both high-speed digital and sensitive analog sensor traces.

For Signal Integrity (SI), I used a controlled-impedance routing strategy on the high-speed data buses to prevent signal reflections. The characteristic impedance (Z0) of a microstrip trace was precisely calculated using an external field solver tool like Polar Instruments Si9000 or Ansys HFSS, not just a simple equation.

For a 50 Ω trace on Layer 1, the tool would calculate the required trace width (w) for a given dielectric height (h). The goal was to maintain a reflection coefficient (Γ) as close to zero as possible.

The reflection coefficient is given by:

Γ= (Z_L - Z_0) / (Z_L + Z_0)

where Z_L is the load impedance.

To validate this, I would perform time-domain reflectometry (TDR) measurements on a prototype. This shows me the exact impedance profile of the trace and allows for fine-tuning.

For Power Integrity (PI), the goal was to minimize voltage fluctuations on the power rails caused by digital switching. I achieved this by designing the power and ground planes to have very low impedance.

The impedance of a parallel-plate power/ground plane pair is approximated by:

Z_plane ≈ h/(w⋅l) * sqrt(μ/ϵ)

By using a very thin dielectric layer (small h) and large, continuous planes, I created a very low-impedance power delivery network (PDN). This was verified on a prototype using a Frequency Domain Impedance Analyzer to measure the PDN's impedance profile across a wide frequency range. This validated the effectiveness of the decoupling strategy.

Antenna and Sensor Placmement Strategy:

The wearable's functionality relied heavily on wireless communication. To achieve the 3-meter location precision from the GNSS module, I implemented a strict design strategy based on RF best practices.

1) Both the GNSS module and the BLE antenna were placed at the very edge of the board, as far as possible from noisy digital components.

2) The ground plane directly beneath the antennas was carefully "cut out" to create a clean radiation pattern, a key principle of quarter-wave monopole antennas where the ground plane acts as a counterpoise

3) The antenna's input impedance was then matched to the 50 Ω output impedance of the RF front-end using a Pi-network matching circuit.

This matching circuit's components were tuned using a Vector Network Analyzer (VNA) to ensure the Voltage Standing Wave Ratio (VSWR) was less than 1.5:1 across the operating frequency band.

--> A low VSWR directly translates to minimal reflected power and maximum transmitted power, which is the gold standard for validating antenna performance.

Deeper explanation

~~ Why use a quarter-wave monopole antennas here?~~

i) Size and Efficiency: A full dipole antenna is a half-wavelength in size, which would be too large for a wearable. A quarter-wave monopole antenna is half the length, making it ideal for a compact device. Its efficiency is high because it resonates at its fundamental frequency, effectively converting electrical current into electromagnetic waves.

ii) Image Theory and the Ground Plane: The "magic" of a quarter-wave monopole lies in its use of a ground plane as a virtual half of the antenna. According to image theory, an antenna placed above a perfectly conducting ground plane creates a mirror image of itself. The quarter-wave monopole and its reflected image together form an equivalent half-wave dipole antenna, which is highly efficient.

This is why the ground plane is not just a copper pour; it's a critical component of the antenna itself.

This is why the ground plane directly beneath the antenna was "cut out." If the ground plane extends directly under the radiating element, it disrupts the quarter-wave resonance and can detune the antenna. The "keep-out" area ensures the antenna radiates freely and its pattern is not skewed.

iii) Impedance and Matching: An ideal quarter-wave monopole antenna has a theoretical input impedance of approximately 36.5+j21.25 Ω. This is not a perfect 50 Ω, which brings us to the importance of the Pi-network matching circuit.

~~Why use a Pi Network Matching Circuit?~~

The Pi-network matching circuit is a key component of the RF front-end.

It's a network of inductors and capacitors that transforms the antenna's impedance to match the 50 Ω output of the RF front-end.

-This ensures maximum power transfer from the transmitter to the antenna and minimal reflected power.

The success of this matching is measured by the Voltage Standing Wave Ratio (VSWR).

VSWR= [1+ abs(Γ)] / [1 - abs(Γ)]

where Γ is the reflection coefficient.

Γ=​ (Z_L - Z_0) / (Z_L + Z_0)

A VSWR of 1.0:1 means a perfect match with zero reflected power.

A VSWR of 1.5:1 means that less than 4% of the power is reflected back—a highly efficient and acceptable value for a production device.

The use of a Vector Network Analyzer (VNA) is the gold standard for verifying this value. The VNA sweeps across the operating frequency band and measures the reflection coefficient, allowing you to tune the matching circuit components until you achieve a low VSWR.

~~ Why 50 Ohms as output impedance?~~

The choice of 50 Ω is not a universal constant, but it's the de facto standard for radio frequency (RF) systems for several practical reasons:

i) Maximum Power Transfer: For a given transmission line and load, maximum power transfer occurs when the load impedance (Z_L) is the complex conjugate of the source impedance (Z_S).

​For most RF components (amplifiers, filters, antennas), a 50 Ω impedance offers a good compromise for matching to a wide variety of components.

ii) Trade-off between Power and Attenuation: In coaxial cables, the impedance is determined by the ratio of the inner conductor diameter (d) to the outer conductor diameter (D) and the dielectric constant (ϵ_r) of the insulator.

The equation is:

Z0 = 138 / sqrt(ϵ_r) * log (D/d)

A 30 Ω impedance maximizes power handling, while a 77 Ω impedance minimizes signal attenuation. The 50 Ω standard represents a balanced compromise between these two factors, which is critical for a wide range of applications from test equipment to telecommunications.

iii) Manufacturability and Cost: The physical dimensions required to achieve 50 Ω impedance in both coaxial cables and PCB traces are practical and easy to manufacture. This standardization allows for widespread component availability and reduces design complexity.