This project combined advanced sensing, data acquisition, and biometric security into a single, highly integrated system. The core challenge was achieving medical-grade data accuracy in a consumer device.


The PCB design for this project was a masterclass in miniaturization and mixed-signal integrity, integrating medical-grade sensors and an optical camera on a single, small form factor.
Eye-Scan Identification, Allowing Specific Individuals Into Confidential Chambers
The Design Process Conducted Myself -- First Section:: Electrical Design | Second Section:: Mechanical & Actuation Design

The system's electrical architecture was based on a robust data acquisition (DAQ) front-end.



Topic - ADC

To capture high-resolution physiological data, I used a multi-channel, 24-bit ADC (e.g., Texas Instruments ADS1292R). This provided the sensitivity required to accurately measure subtle signals from a suite of sensors, including a MEMS accelerometer for posture analysis (in case user moves, we need to know this to re-calibrate the landmarks captured) and a custom-designed optics module for PPG.


Topic - Analog & Digital Mixed, Isolation + Filtering Design

The most challenging aspect was the mixed-signal PCB design.


I implemented a strict isolation plan: with a dedicated ground plane for the analog front-end and a physical separation of at least 10 mm between the sensitive analog traces (PPG, EKG) and the noisy digital and power circuits.

- To further reduce noise, I used an active Butterworth low-pass filter to roll off high-frequency noise above 100 Hz from the PPG signal.



Topic - Customizing Peripheral Modules

For biometric security, I integrated two separate optical modules: the IriShield MK212OU Infrared Camera for iris recognition and a custom-designed facial landmark sensor array.


- The system's authentication process was secured with a dedicated biometric-security encryption module on the microcontroller, utilizing a TRNG (True Random Number Generator) to generate cryptographic keys for data at rest.



Topic - Filter Regulated Power Design Choices

- Power for the high-power IR camera was required to hav a very stable powr supply --> Supplied via a dedicated low noise LDO (Low-Dropout Regulator) (an Analog Devices ADP7118) with a clean power filter network to prevent voltage fluctuations from impacting other sensors.


- The main PCB included a filtering network of multiple parallel capacitors (0.1µF and 1µF) placed close to the power pins to reduce high-frequency noise and voltage ripple.


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MORE TOPIC LEVEL DETAIL ON THE FINALIZED EE DESIGN STRATEGY:


Flex PCB Integration: The device used a flexible, PDMS film-based sensor, which required a custom flexible PCB (Flex PCB) to connect the sensor array to the rigid main board. The Flex PCB was designed with a tight bending radius and routed with thin, flexible copper traces. This allowed the wearable to conform to the user's skin without damaging the electrical connections.


Purposed Layout, Component Placement & Isolation: I meticulously placed components to achieve both a compact layout and signal isolation.

-- The sensitive optical photodetector and its low-noise transimpedance amplifier (TIA) were placed in a corner of the board, as far as possible from the noisy digital processor and the biometric camera's high-speed data bus.

- A dedicated guard ring was routed around the TIA circuit to protect the low-level analog signal from external interference.



Signal Integrity & Noise Immunity:


Question: How did you quantify the noise reduction from your mixed-signal PCB layout? What was the measured signal-to-noise ratio (SNR) for the PPG sensor, and how did it compare to a conventional design?


Rationale: High-resolution physiological signals are extremely susceptible to noise from adjacent digital circuits. The separation of analog and digital circuits is a fundamental principle of mixed-signal design. Quantifying the noise reduction proves the effectiveness of the isolation techniques.


Analog Front-End (AFE) Noise Budget:

The total noise for the AFE was calculated using the root sum of squares (RSS) of all noise sources: op-amp noise, resistor noise, and ADC quantization noise.


V_n_total = sqrt( (Vn_opamp)^2 +(Vn_resistor)^2 +(Vn_ADC)^2 )

I used a low-noise operational amplifier (e.g. Analog Devices AD8620) with a voltage noise density of only 2.2 nV/√Hz at 1 kHz to minimize noise contributions.


The final design achieved a total input-referred noise of < 5 µV RMS, which, for a typical PPG signal amplitude of 20 mV, resulted in an SNR of over 60 dB.


Butterworth Filter Design:

To remove 60 Hz line noise and high-frequency motion artifacts, a 2nd-order Sallen-Key Butterworth low-pass filter was designed with a cutoff frequency (fc) of 10 Hz.


fc​ = 1/(2π*(sqrt(R1⋅R2⋅C1⋅C2))


With R1 = R2 = 15.9 kΩ and C1 = C2 = 1 µF, the cutoff frequency was set at 10 Hz. This filter design was experimentally verified to have a sharp roll-off of -40 dB/decade above the cutoff, effectively isolating the low-frequency PPG signal.


Quantifying Noise Reduction in Mixed-Signal Layouts

A central principle of my design was the strict isolation of analog and digital circuits to minimize noise. I quantified this noise reduction by measuring the Signal-to-Noise Ratio (SNR) before and after implementing the isolation plan.


The SNR is a fundamental metric for signal quality, calculated as:


SNR_dB​ = 20log_10 (Vsignal_RMS / Vnoise_RMS)


In a conventional, non-isolated PCB layout, digital switching noise from the processor and data bus would couple onto the analog signal traces. I used a high-resolution oscilloscope to measure the noise floor of a prototype. The measured noise floor (at conventional poorly-isolated design) was approximately 100 μVRMS, resulting in an unacceptable SNR of only 46dB for the 20 mV PPG signal (20mV is the typical PPG signal amplitude).


Following the principles from "The Art of Electronics,"aka the industry best practices for mixede-signal design, I implemented a strict isolation plan to improve gain accurately.

This included a dedicated ground plane for the analog front-end, physically separated from the noisy digital and power grounds. The two planes were connected at a single point to prevent ground loops.

- This physical separation and a robust grounding scheme reduced the measured noise floor to less than 5 μVRMS --> improving the SNR to over 72dB, a significant gain from the original 46dB that made the subtle physiological signals readable and accurate. This quantifiable improvement directly validated the design choice.



Optoelectronics & PPG Accuracy:


Question: How did you calibrate the PPG sensor to ensure diagnostic accuracy? Can you provide a transfer function for the photodiode circuit and prove the signal is free from artifacts?


Rationale: A simple PPG circuit is prone to motion and ambient light artifacts. The system must be able to accurately differentiate the blood flow signal from these noise sources.

A raw PPG signal is a mixture of blood flow data, motion artifacts, and ambient light noise. A robust calibration process and a well-defined transfer function are essential to isolate the diagnostic signal.


Calibrating the PPG Sensor and Analyzing its Transfer Function


The accuracy of the PPG sensor is paramount for diagnostic value. The raw signal from a photodiode is a tiny current that is susceptible to noise. The role of the front-end circuit is to convert this current into a measurable voltage while filtering out unwanted artifacts.


The heart of the PPG sensor is a photodiode circuit with a transimpedance amplifier (TIA) which converts the photodiode current (I_pd) into a voltage (Vout) using a feedback resistor (Rf).


The simplified transfer function (Vout/Vin) of this conversion is:


Vout(s) = - [ Rf / (1+s*Rf*Cf) ] * I_pd(s)


where Rf is the feedback resistor and I_pd is the current from the photodiode.


This equation shows how the circuit converts current to voltage and, with the feedback capacitor (Cf), acts as a low-pass filter.

To calibrate the sensor, a known optical signal was applied, and the circuit's response was measured to establish a linear relationship between light intensity and the output voltage.




A key challenge was the removal of motion artifacts and 60 Hz line noise.


This was achieved by using a 2nd-order Sallen-Key Butterworth filter with a cutoff frequency of 10 Hz (an active low pass filter) in this TIA stage.


- The equation for this filter is:

fc = 1/( 2*pi*sqrt(R1*R2*C1*C2) )


- It was set at 10 Hz to bypass the physiological heart rate signal (typically 0.8-3 Hz) while attenuating high-frequency noise from motion and power lines. The filter was experimentally verified using a function generator and an oscilloscope to confirm its frequency response and a sharp roll-off of -40 dB/decade.​


By carefully selecting resistor and capacitor values, I tuned the filter to pass the low-frequency PPG signal while attenuating high-frequency noise by -40 dB per decade. This ensured that the final signal was a clean representation of the blood flow, free from common artifacts.



3. Biometric Security & Data Integrity:


Question: How did you validate the security of the biometric data? Can you prove the integrity of the data encryption process and the reliability of the TRNG?


Rationale: Biometric data is highly sensitive. The security measures must be robust and validated to a high degree to ensure user privacy and compliance with medical data regulations.

To prove the integrity of the TRNG, a secure biometric system must protect sensitive data both at rest and in transit. The core of this security is a robust encryption algorithm and a high-quality TRNG to generate unpredictable cryptographic keys.


Proving Biometric Data Integrity and TRNG Reliability


Securing biometric data is a primary concern for privacy and compliance. The system's security foundation is a robust encryption process, dependent on a high-quality True Random Number Generator (TRNG) for key generation. The reliability of the TRNG was not assumed but rigorously validated.


A high-quality TRNG is a hardware-based component that generates unpredictable bitstreams from a physical source of randomness, such as thermal noise or oscillator jitter.

A TRNG's quality is measured by its entropy, which is a measure of its randomness and unpredictability.


The output's unpredictability is measured by its entropy (H), which can be calculated using a theoretical model based on the probability of a bit being '1' or '0'.

For an ideal random source, the entropy is 1 bit per sample. The equation for entropy is:


H(X)= − ∑ (i=1 to n) [ P(x_i) * log_2*P(x_i) ]


To prove the TRNG's output was statistically random and therefore suitable for cryptographic key generation, I subjected its output to the NIST SP 800-22 statistical test suite. This suite evaluates the randomness of a binary sequence and includes tests such as the Monobit Test, Frequency Test, and Runs Test. A successful run on these tests (with a p-value above 0.01) validates the TRNG's output is not distinguishable from a truly random sequence. This high-entropy output was then used as the seed for a key derivation function (KDF), which generated a unique, high-entropy key for AES-256 data encryption, thereby ensuring the integrity of the biometric data.



In specifics, I used a hardware-based TRNG that relied on the jitter from a free-running oscillator. The entropy (H) is calculated in bits, and the TRNG's output was subject to a battery of statistical tests, including the NIST SP 800-22 test suite.


A high-quality TRNG should pass all tests, including:

- Monobit Test: Checks if the number of 1s and 0s are approximately equal.

- Frequency Test: Ensures the occurrence of ones and zeros is statistically random.

- Runs Test: Checks for the number of runs (sequences of consecutive identical bits).


A passing result on these tests, with a p-value above 0.01, proved the randomness of the TRNG. The encryption process (AES-256) was validated by encrypting and decrypting large datasets to ensure no data loss or corruption, and by running known-plaintext attacks to verify its resistance to cryptographic exploits.


PCB Design Component Selection


Low Noise LDO and Filtering Network

Question: What values were chosen for the low-noise LDO filtering network to ensure stable power for the IR camera, and how were they integrated?


Rationale: The IR camera's performance is sensitive to voltage fluctuations and noise. A clean power supply is essential.


Voltage Ripple Reduction:



The IR camera required a highly stable and clean power supply to ensure consistent output and prevent noise from impacting the sensitive retinal and facial recognition sensors.

Hence, a low-noise LDO was the ideal component for this task.


To find an ideal choice, I scavangede for a model that had exceptional power supply rejection ratio (PSRR) and ultra-low outut noise. The Analog Devices ADP7118 LDO had PSSR of 88 dB at 1 kHz and ultra-low output noise of 5µV RMS.




I wanted to further improve power quality though, so a filtering network was placed directly at the power pins.

This network consisted of multiple parallel capacitors of different values, a standard practice in power electronics to reduce impedance across a wide frequency range (known as low-impedance power delivery)


The impedance (Z_c) of a capacitor is given by:

Z_c = 1/(2πfC)

- A small-value capacitor (e.g., 0.1µF) has a very low impedance at high frequencies, effectively shunting ('reducing') high-frequency digital noise to ground.

- A larger-value capacitor (e.g., 1µF) has low impedance at mid-range frequencies handles the mid-frequency noise,

- The bulk capacitor on the board handles low frequencies.


By placing these capacitors in parallel and as close as possible to the component's power pins, I created a low-impedance path to ground for noise across a broad frequency speectrum, effectively shunting noise away from the power pin and ensuring the IR camera received a stable, clean voltage supply.


This design strategy ensures a stable power rail: minimizing voltage ripple and preventing the camera's operation from introducing noise into the rest of the system's power delivery network.



ADC Selection & DAQ Frontend Design


Question: Why was a 24-bit ADC chosen, and why is the system considered a DAQ frontend?


Rationale: The ADC is the core of any DAQ system. A high-resolution ADC is crucial for detecting subtle physiological signals.



The core of the biometric profiler is its ability to capture high-resolution physiological data, making the system a Data Acquisition (DAQ) frontend.


I chose a 24-bit ADC (e.g., Texas Instruments ADS1292R) because it provides the sensitivity necessary to resolve minute changes in physiological signals.


ADC Resolution & LSB Calculation


The resolution of a 24-bit ADC is a critical benefit. The resolution of an ADC determines the smallest voltage change it can detect.


Normally, the voltage of one LSB (Least Significant Bit) is calculated by:

V_LSB = Vref / 2^N

where Vref is the reference voltage and N is the number of bits (eg. 24bit ADC means N=24).


For a 24-bit ADC with a 5V reference voltage the resolution is:

V_LSB = 5V/2^24 ≈ 298nV


This sub-microvolt resolution is critical. A physiological signal like an EKG or PPG may have a peak-to-peak amplitude of only a few millivolts.

A 24-bit ADC can represent this signal with over 10,000 discrete levels, allowing the microcontroller to accurately digitize the signal and extract subtle features that a lower-resolution ADC (e.g., 12-bit) would miss --> this extremely high resolution allows the system to accurately measure very small changes in voltage from the PPG sensor, making it a true DAQ (Data Acquisition) frontend.



Knowing this helps us ensure every bit of data was a meaningful physiological measurement and not just noise, as the ADC is the central hub for all sensor data, converting physical signals into a digital format for processing. The system's entire design, from the isolated ground planes to the low-noise LDOs, was built to support the high resolution of the ADC and in the end, this project worked as planned beecause with this Front End Design, I was now able to accurately detect and analyze physiological biomarkers.





The sensor was developed as a flexible, biocompatible wearable.


Topic - Biocompatible Polymer (Material Science)

It was fabricated by casting a PDMS (polydimethylsiloxane) film and embedding a network of silica micro/nanofibers to create a stretchable, yet structurally stable, substrate for the optical sensors.


Topic - Sealing Chassis DFM

The mechanical design of the wearable was a multi-part process: a flexible layer with the sensors, a rigid, ultrathin PCB, and an overmolded housing to seal the electronics.


Topic - Stress Calculation for the Packaging

The packaging was engineered to have a compression load rating of 100 psi to ensure a consistent skin interface for optical sensing, a critical requirement for accurate PPG and sweat biosensor data.



Biocompatible Polymer & Flexible PCB


Question: How was the flexible PCB designed to work with a stretchable polymer film? What was the design logic and what calculations were used?


Rationale: Integrating a rigid electrical component with a highly flexible material requires a specialized design to prevent stress fractures and electrical failure.


Choice of Material

The wearable's form factor and function were made possible by the unique material science of the substrate. The device's flexibility relied on a flexible PCB (Flex PCB), which required specific design considerations to prevent damage.


The choice of PDMS (polydimethylsiloxane) as a substrate for the optical sensors was based on its biocompatibility and high elongation at break (>100%). To integrate the rigid electronics, I designed a thin, single-layer Flex PCB using polyimide as the base material.


The key mechanical design principle was to ensure the copper traces did not fatigue and crack under repeated bending. This was achieved by calculating the minimum bending radius.that the copper could withstand without exceeding its maximum strain limit (ϵ_max).


Flex PCB Bending Radius Calculation:


Considering the Flex PCB was a single-layer board made of a thin copper layer on a flexible polyimide substrate, the minimum bending radius (r_min) to prevent damage to the copper traces is given by:

r_min = T_total / (2*ϵ_max - ϵ_substrate) (or ϵ_material / (ϵ_copper*ϵ_max ) * T_copper)

where T _total is the total thickness, and ϵ _max is the maximum strain limit of the copper.


By using a thin copper layer (18µm) and a compliant polyimide substrate, the calculated minimum bending radius was less than 5mm, which allowed the device to flex and conform to the body's natural curvature without electrical or mechanical failure. This engineering calculation was critical to ensuring long-term device durability.



Sealing & Stress Calculation


Question: What mechanical engineering principles and material science equations were used to validate the design strategy for sealing and packaging?


Rationale: The packaging must protect the electronics and maintain a consistent interface with the skin for accurate sensing.


Classic Stress and Compressive Load:


The compression load rating of the packaging was a critical design parameter.


I used the standard engineering compressive stress (σ) equation on the packaging to validate the chassis design, gauging how much it could withstand in external force:

σ= F/A


The device's ruggedness and accuracy depended on its ability to withstand external forces and maintain a consistent interface with the skin.


To achieve the a finding of the compression withstanding value or compression rating, I used FEA (Finite Element Analysis) to simulate the stress distribution under load.


The FEA model helped identify stress concentration points and optimize the material thickness and geometry of the chassis. The packaging was engineered to have a compression load rating of 100 psi to ensure a reliable optical seal, aka "designed to withstand a 100 psi compressive load, which translates to a force of 100 lbs for a 1-square-inch area" in end result, considering the amount of pressure such a device can be subjected to when submergede.


Design for force distribution

The final overmolded housing, made of a rigid PC (polycarbonate) core and a softer TPE (thermoplastic elastomer) gasket, was able to distribute the force evenly and maintain a consistent interface for the PPG sensor

--> This design was crucial for preventing air gaps between the sensor and the skin, which would introduce significant noise and invalidate the optical readings.


This was a critical test to ensure the device would maintain contact and prevent internal component damage under pressure.







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